As is known, lithography is commonly used when manufacturing integrated circuits. The process generally includes forming a photoresist layer on the surface of a semiconductor wafer, and then positioning a mask over the resist-coated wafer. The mask typically has light non-transmissive (opaque) regions of chrome and light transmissive (transparent) regions of quartz. Radiation from a light source (e.g., ultra-violet or deep ultra-violet light, etc) and focused via an optical lens system is then applied to the mask. The light passes through the transparent mask regions and exposes the underlying photoresist layer, and is blocked by the opaque mask regions to leave those underlying portions of photoresist layer unexposed. Depending on the specific process used, either the exposed or non-exposed regions of photoresist layer can then be removed, thereby leaving a patterned resist layer on the wafer, which in turn allows for subsequent processing of the wafer such as, for example, etching, depositing, and other typical semiconductor processes.
As is further known, the depth of field of the optical lens system is inversely proportional to the numerical aperture of the lens system, and since the surface of the integrated circuit is generally not optically flat, there is a tradeoff between good focus and good resolution. In this sense, limitations on conventional lithography processes effectively limit the minimum realizable dimensions of circuitry being formed on the wafer. One conventional technique that enables smaller minimum device dimensions is generally referred to as phase shift masking (PSM).
Conventional PSM techniques included, for example, embedded phase shift mask (EPSM) and alternating phase shifter mask (APSM). However, such conventional PSM processes are associated with a number of non-trivial problems, some of which limit minimum attainable feature size.